This will allow for easier implementation of ARM-optimized functions in libraries other than libavcodec.
		
			
				
	
	
		
			273 lines
		
	
	
		
			9.7 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			273 lines
		
	
	
		
			9.7 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
| /*
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|  * Copyright (c) 2012 Mans Rullgard
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|  *
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|  * This file is part of Libav.
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|  *
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|  * Libav is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU Lesser General Public
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|  * License as published by the Free Software Foundation; either
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|  * version 2.1 of the License, or (at your option) any later version.
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|  *
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|  * Libav is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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|  * Lesser General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU Lesser General Public
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|  * License along with Libav; if not, write to the Free Software
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|  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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|  */
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| 
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| #include "libavutil/arm/asm.S"
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| 
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| function ff_ps_add_squares_neon, export=1
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|         mov             r3,  r0
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|         sub             r2,  r2,  #4
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|         vld1.32         {q0},     [r1,:128]!
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|         vmul.f32        q0,  q0,  q0
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|         vld1.32         {q2},     [r1,:128]!
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|         vmul.f32        q2,  q2,  q2
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|         vld1.32         {q1},     [r0,:128]!
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| 1:
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|         vpadd.f32       d6,  d0,  d1
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|         vld1.32         {q0},     [r1,:128]!
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|         vpadd.f32       d7,  d4,  d5
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|         vmul.f32        q0,  q0,  q0
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|         vld1.32         {q2},     [r1,:128]!
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|         vadd.f32        q3,  q1,  q3
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|         vld1.32         {q1},     [r0,:128]!
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|         vmul.f32        q2,  q2,  q2
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|         vst1.32         {q3},     [r3,:128]!
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|         subs            r2,  r2,  #4
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|         bgt             1b
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|         vpadd.f32       d6,  d0,  d1
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|         vpadd.f32       d7,  d4,  d5
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|         vadd.f32        q1,  q1,  q3
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|         vst1.32         {q1},     [r3,:128]!
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|         bx              lr
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| endfunc
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| 
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| function ff_ps_mul_pair_single_neon, export=1
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|         sub             r3,  r3,  #4
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|         tst             r1,  #8
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|         bne             2f
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|         vld1.32         {q0},     [r1,:128]!
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| 1:
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|         vld1.32         {q3},     [r2,:128]!
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|         vmul.f32        d4,  d0,  d6[0]
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|         vmul.f32        d5,  d1,  d6[1]
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|         vld1.32         {q1},     [r1,:128]!
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|         vmul.f32        d6,  d2,  d7[0]
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|         vmul.f32        d7,  d3,  d7[1]
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|         vld1.32         {q0},     [r1,:128]!
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|         vst1.32         {q2,q3},  [r0,:128]!
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|         subs            r3,  r3,  #4
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|         bgt             1b
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|         vld1.32         {q3},     [r2,:128]!
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|         vmul.f32        d4,  d0,  d6[0]
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|         vmul.f32        d5,  d1,  d6[1]
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|         vld1.32         {q1},     [r1,:128]!
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|         vmul.f32        d6,  d2,  d7[0]
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|         vmul.f32        d7,  d3,  d7[1]
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|         vst1.32         {q2,q3},  [r0,:128]!
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|         bx              lr
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| 2:
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|         vld1.32         {d0},     [r1,:64]!
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|         vld1.32         {d1,d2},  [r1,:128]!
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| 1:
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|         vld1.32         {q3},     [r2,:128]!
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|         vmul.f32        d4,  d0,  d6[0]
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|         vmul.f32        d5,  d1,  d6[1]
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|         vld1.32         {d0,d1},  [r1,:128]!
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|         vmul.f32        d6,  d2,  d7[0]
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|         vmul.f32        d7,  d0,  d7[1]
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|         vmov            d0,  d1
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|         vld1.32         {d1,d2},  [r1,:128]!
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|         vst1.32         {q2,q3},  [r0,:128]!
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|         subs            r3,  r3,  #4
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|         bgt             1b
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|         vld1.32         {q3},     [r2,:128]!
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|         vmul.f32        d4,  d0,  d6[0]
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|         vmul.f32        d5,  d1,  d6[1]
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|         vld1.32         {d0},     [r1,:64]!
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|         vmul.f32        d6,  d2,  d7[0]
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|         vmul.f32        d7,  d0,  d7[1]
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|         vst1.32         {q2,q3},  [r0,:128]!
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|         bx              lr
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| endfunc
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| 
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| function ff_ps_hybrid_synthesis_deint_neon, export=1
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|         push            {r4-r8,lr}
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|         add             r0,  r0,  r2,  lsl #2
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|         add             r1,  r1,  r2,  lsl #5+1+2
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|         rsb             r2,  r2,  #64
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|         mov             r5,  #64*4
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|         mov             lr,  r0
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|         add             r4,  r0,  #38*64*4
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|         mov             r12, r3
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| 2:
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|         vld1.32         {d0,d1},  [r1,:128]!
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|         vst1.32         {d0[0]},  [lr,:32], r5
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|         vst1.32         {d0[1]},  [r4,:32], r5
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|         vst1.32         {d1[0]},  [lr,:32], r5
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|         vst1.32         {d1[1]},  [r4,:32], r5
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|         subs            r12, r12, #2
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|         bgt             2b
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|         add             r0,  r0,  #4
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|         sub             r2,  r2,  #1
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|         tst             r2,  #2
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|         bne             6f
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| 1:
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|         mov             lr,  r0
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|         add             r4,  r0,  #38*64*4
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|         add             r6,  r1,  #  32*2*4
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|         add             r7,  r1,  #2*32*2*4
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|         add             r8,  r1,  #3*32*2*4
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|         mov             r12, r3
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| 2:
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|         vld1.32         {d0,d1},  [r1,:128]!
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|         vld1.32         {d2,d3},  [r6,:128]!
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|         vld1.32         {d4,d5},  [r7,:128]!
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|         vld1.32         {d6,d7},  [r8,:128]!
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|         vst4.32         {d0[0],d2[0],d4[0],d6[0]}, [lr,:128], r5
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|         vst4.32         {d0[1],d2[1],d4[1],d6[1]}, [r4,:128], r5
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|         vst4.32         {d1[0],d3[0],d5[0],d7[0]}, [lr,:128], r5
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|         vst4.32         {d1[1],d3[1],d5[1],d7[1]}, [r4,:128], r5
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|         subs            r12, r12, #2
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|         bgt             2b
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|         add             r0,  r0,  #16
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|         add             r1,  r1,  #3*32*2*4
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|         subs            r2,  r2,  #4
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|         bgt             1b
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|         pop             {r4-r8,pc}
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| 6:
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|         mov             lr,  r0
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|         add             r4,  r0,  #38*64*4
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|         add             r6,  r1,  #32*2*4
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|         mov             r12, r3
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| 2:
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|         vld1.32         {d0,d1},  [r1,:128]!
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|         vld1.32         {d2,d3},  [r6,:128]!
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|         vst2.32         {d0[0],d2[0]}, [lr,:64], r5
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|         vst2.32         {d0[1],d2[1]}, [r4,:64], r5
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|         vst2.32         {d1[0],d3[0]}, [lr,:64], r5
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|         vst2.32         {d1[1],d3[1]}, [r4,:64], r5
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|         subs            r12, r12, #2
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|         bgt             2b
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|         add             r0,  r0,  #8
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|         add             r1,  r1,  #32*2*4
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|         sub             r2,  r2,  #2
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|         b               1b
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| endfunc
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| 
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| function ff_ps_hybrid_analysis_neon, export=1
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|         vldm            r1,  {d19-d31}
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|         ldr             r12, [sp]
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|         lsl             r3,  r3,  #3
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|         vadd.f32        d16, d19, d31
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|         vadd.f32        d17, d20, d30
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|         vsub.f32        d18, d19, d31
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|         vsub.f32        d19, d20, d30
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|         vsub.f32        d0,  d21, d29
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|         vsub.f32        d1,  d22, d28
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|         vadd.f32        d2,  d21, d29
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|         vadd.f32        d3,  d22, d28
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|         vadd.f32        d20, d23, d27
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|         vadd.f32        d21, d24, d26
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|         vsub.f32        d22, d23, d27
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|         vsub.f32        d23, d24, d26
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|         vmov.i32        d6,  #1<<31
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|         vmov.i32        d7,  #0
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|         vmov.f32        q14, #0.0
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|         vmov.f32        q15, #0.0
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|         vtrn.32         d6,  d7
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|         vrev64.32       q9,  q9
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|         vrev64.32       q0,  q0
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|         vrev64.32       q11, q11
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|         veor            q9,  q9,  q3
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|         veor            q0,  q0,  q3
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|         veor            q11, q11, q3
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|         vld1.32         {q13},    [r2,:128]!
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|         vtrn.32         q8,  q9
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|         vtrn.32         q1,  q0
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|         vtrn.32         q10, q11
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|         sub             r12, r12, #1
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|         vmla.f32        q14, q8,  q13
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|         vld1.32         {q2},     [r2,:128]!
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|         vmla.f32        q15, q9,  q13
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| 1:
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|         vmla.f32        q14, q1,  q2
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|         vld1.32         {q13},    [r2,:128]!
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|         vmla.f32        q15, q0,  q2
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|         vmla.f32        q14, q10, q13
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|         vld1.32         {q2},     [r2,:128]!
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|         vmla.f32        q15, q11, q13
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|         vld1.32         {q13},    [r2,:128]!
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|         vadd.f32        d6,  d28, d29
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|         vadd.f32        d7,  d30, d31
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|         vmov.f32        q14, #0.0
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|         vmov.f32        q15, #0.0
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|         vmla.f32        q14, q8,  q13
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|         vpadd.f32       d6,  d6,  d7
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|         vmla.f32        q15, q9,  q13
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|         vmla.f32        d6,  d25, d4[0]
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|         vld1.32         {q2},     [r2,:128]!
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|         vst1.32         {d6},     [r0,:64], r3
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|         subs            r12, r12, #1
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|         bgt             1b
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|         vmla.f32        q14, q1,  q2
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|         vld1.32         {q13},    [r2,:128]!
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|         vmla.f32        q15, q0,  q2
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|         vmla.f32        q14, q10, q13
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|         vld1.32         {q2},     [r2,:128]!
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|         vmla.f32        q15, q11, q13
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|         vadd.f32        d6,  d28, d29
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|         vadd.f32        d7,  d30, d31
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|         vpadd.f32       d6,  d6,  d7
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|         vmla.f32        d6,  d25, d4[0]
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|         vst1.32         {d6},     [r0,:64], r3
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|         bx              lr
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| endfunc
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| 
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| function ff_ps_stereo_interpolate_neon, export=1
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|         vld1.32         {q0},     [r2]
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|         vld1.32         {q14},    [r3]
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|         vadd.f32        q15, q14, q14
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|         mov             r2,  r0
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|         mov             r3,  r1
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|         ldr             r12, [sp]
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|         vadd.f32        q1,  q0,  q14
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|         vadd.f32        q0,  q0,  q15
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|         vld1.32         {q2},     [r0,:64]!
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|         vld1.32         {q3},     [r1,:64]!
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|         subs            r12, r12, #1
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|         beq             2f
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| 1:
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|         vmul.f32        d16, d4,  d2[0]
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|         vmul.f32        d17, d5,  d0[0]
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|         vmul.f32        d18, d4,  d2[1]
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|         vmul.f32        d19, d5,  d0[1]
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|         vmla.f32        d16, d6,  d3[0]
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|         vmla.f32        d17, d7,  d1[0]
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|         vmla.f32        d18, d6,  d3[1]
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|         vmla.f32        d19, d7,  d1[1]
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|         vadd.f32        q1,  q1,  q15
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|         vadd.f32        q0,  q0,  q15
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|         vld1.32         {q2},     [r0,:64]!
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|         vld1.32         {q3},     [r1,:64]!
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|         vst1.32         {q8},     [r2,:64]!
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|         vst1.32         {q9},     [r3,:64]!
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|         subs            r12, r12, #2
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|         bgt             1b
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|         it              lt
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|         bxlt            lr
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| 2:
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|         vmul.f32        d16, d4,  d2[0]
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|         vmul.f32        d18, d4,  d2[1]
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|         vmla.f32        d16, d6,  d3[0]
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|         vmla.f32        d18, d6,  d3[1]
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|         vst1.32         {d16},    [r2,:64]!
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|         vst1.32         {d18},    [r3,:64]!
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|         bx              lr
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| endfunc
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