179 lines
5.0 KiB
ArmAsm
179 lines
5.0 KiB
ArmAsm
/****************************************************************************
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* Copyright © 2022 Rémi Denis-Courmont.
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111, USA.
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*****************************************************************************/
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#include "libavutil/riscv/asm.S"
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#if (__riscv_xlen == 64)
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const fail_s_reg
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.asciz "callee-saved integer register clobbered"
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endconst
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const fail_fs_reg
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.asciz "callee-saved floating-point register clobbered"
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endconst
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const fail_rsvd_reg
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.asciz "unallocatable register clobbered"
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endconst
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.section .tbss, "waT"
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.align 3
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.hidden checked_func
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.hidden saved_regs
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checked_func:
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.quad 0
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saved_regs:
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/* Space to spill RA, SP, GP, TP, S0-S11 and FS0-FS11 */
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.rept 4 + 12 + 12
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.quad 0
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.endr
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func checkasm_set_function
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la.tls.ie t0, checked_func
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add t0, tp, t0
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sd a0, (t0)
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ret
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endfunc
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func checkasm_get_wrapper, v
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addi sp, sp, -16
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sd fp, (sp)
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sd ra, 8(sp)
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addi fp, sp, 16
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call av_get_cpu_flags
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andi t0, a0, 8 /* AV_CPU_FLAG_RVV_I32 */
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lla a0, 3f
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beqz t0, 1f
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lla a0, 2f
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1:
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ld ra, 8(sp)
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ld fp, (sp)
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addi sp, sp, 16
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ret
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2: /* <-- Entry point with the Vector extension --> */
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/* Clobber the vectors */
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vsetvli t0, zero, e32, m8, ta, ma
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li t0, 0xdeadbeef
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vmv.v.x v0, t0
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vmv.v.x v8, t0
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vmv.v.x v16, t0
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vmv.v.x v24, t0
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/* Clobber the vector configuration */
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li t0, 0 /* Vector length: zero */
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li t1, -1 << 31 /* Vector type: illegal */
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vsetvl zero, t0, t1
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csrwi vxrm, 3 /* Rounding mode: round-to-odd */
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csrwi vxsat, 1 /* Saturation: encountered */
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3: /* <-- Entry point without the Vector extension --> */
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/* Save RA, unallocatable and callee-saved registers */
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la.tls.ie t0, saved_regs
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add t0, tp, t0
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sd ra, (t0)
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sd sp, 8(t0)
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sd gp, 16(t0)
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sd tp, 24(t0)
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.irp n, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11
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sd s\n, (32 + (16 * \n))(t0)
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fsd fs\n, (40 + (16 * \n))(t0)
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.endr
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/* Clobber the stack space right below SP */
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li t0, 0xdeadbeef1badf00d
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.rept 16
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addi sp, sp, -16
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sd t0, (sp)
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sd t0, 8(sp)
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.endr
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addi sp, sp, 256
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/* Clobber the saved and temporary registers */
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.irp n, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11
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.if (\n > 0 && \n < 7)
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mv t\n, t0
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.endif
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fmv.d.x ft\n, t0
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mv s\n, t0
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fmv.d.x fs\n, t0
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.endr
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/* Call the tested function */
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la.tls.ie t0, checked_func
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add t0, tp, t0
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ld t1, (t0)
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sd zero, (t0)
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jalr t1
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/* Check special register values */
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la.tls.ie t0, saved_regs
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add t0, tp, t0
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ld t1, 8(t0)
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bne t1, sp, 5f
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ld t1, 16(t0)
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bne t1, gp, 5f
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ld t1, 24(t0) // If TP was corrupted, we probably will have...
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bne t1, tp, 5f // ...already crashed before we even get here.
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/* Check value of saved registers */
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li t0, 0xdeadbeef1badf00d
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.irp n, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11
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bne t0, s\n, 6f
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#ifdef __riscv_float_abi_double
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/* TODO: check float ABI single too */
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fmv.x.d t1, fs\n
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bne t0, t1, 7f
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#endif
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.endr
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4:
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/* Restore RA and saved registers */
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la.tls.ie t0, saved_regs
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add t0, tp, t0
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ld ra, (t0)
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.irp n, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11
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ld s\n, (32 + (16 * \n))(t0)
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fld fs\n, (40 + (16 * \n))(t0)
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.endr
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ret
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5:
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lla a0, fail_rsvd_reg
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call checkasm_fail_func
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tail abort /* The test harness would probably crash anyway */
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6:
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lla a0, fail_s_reg
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call checkasm_fail_func
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j 4b
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7:
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lla a0, fail_fs_reg
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call checkasm_fail_func
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j 4b
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endfunc
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#endif
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