aa61ca0c59
* qatar/master: Add some missing mathematics.h #includes for av_rescale(). opencore-amr: Add missing initializer braces to shut up gcc warning. ARM: workaround for bug in GNU assembler dv: fix comment wording mistake Rename libavcodec/high_bit_depth.h ---> libavcodec/bit_depth_template.c dv: fix valgrind use of uninitialised value warnings. mxfenc: fix ignored drop flag in binary timecode representation. PPC: use Altivec IMDCT only for supported sizes dv: fix comment spelling configure: simplify -rpath-link linker flag Merged-by: Michael Niedermayer <michaelni@gmx.at>
262 lines
9.4 KiB
ArmAsm
262 lines
9.4 KiB
ArmAsm
/*
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* Copyright (c) 2011 Mans Rullgard <mans@mansr.com>
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*
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* This file is part of Libav.
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*
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* Libav is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* Libav is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with Libav; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "asm.S"
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.macro bflies d0, d1, r0, r1
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vrev64.32 \r0, \d1 @ t5, t6, t1, t2
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vhsub.s16 \r1, \d1, \r0 @ t1-t5, t2-t6, t5-t1, t6-t2
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vhadd.s16 \r0, \d1, \r0 @ t1+t5, t2+t6, t5+t1, t6+t2
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vext.16 \r1, \r1, \r1, #1 @ t2-t6, t5-t1, t6-t2, t1-t5
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vtrn.32 \r0, \r1 @ t1+t5, t2+t6, t2-t6, t5-t1
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@ t5, t6, t4, t3
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vhsub.s16 \d1, \d0, \r0
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vhadd.s16 \d0, \d0, \r0
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.endm
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.macro transform01 q0, q1, d3, c0, c1, r0, w0, w1
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vrev32.16 \r0, \d3
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vmull.s16 \w0, \d3, \c0
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vmlal.s16 \w0, \r0, \c1
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vshrn.s32 \d3, \w0, #15
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bflies \q0, \q1, \w0, \w1
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.endm
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.macro transform2 d0, d1, d2, d3, q0, q1, c0, c1, c2, c3, \
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r0, r1, w0, w1
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vrev32.16 \r0, \d1
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vrev32.16 \r1, \d3
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vmull.s16 \w0, \d1, \c0
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vmlal.s16 \w0, \r0, \c1
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vmull.s16 \w1, \d3, \c2
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vmlal.s16 \w1, \r1, \c3
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vshrn.s32 \d1, \w0, #15
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vshrn.s32 \d3, \w1, #15
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bflies \q0, \q1, \w0, \w1
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.endm
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.macro fft4 d0, d1, r0, r1
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vhsub.s16 \r0, \d0, \d1 @ t3, t4, t8, t7
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vhsub.s16 \r1, \d1, \d0
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vhadd.s16 \d0, \d0, \d1 @ t1, t2, t6, t5
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vmov.i64 \d1, #0xffff00000000
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vbit \r0, \r1, \d1
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vrev64.16 \r1, \r0 @ t7, t8, t4, t3
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vtrn.32 \r0, \r1 @ t3, t4, t7, t8
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vtrn.32 \d0, \r0 @ t1, t2, t3, t4, t6, t5, t8, t7
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vhsub.s16 \d1, \d0, \r0 @ r2, i2, r3, i1
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vhadd.s16 \d0, \d0, \r0 @ r0, i0, r1, i3
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.endm
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.macro fft8 d0, d1, d2, d3, q0, q1, c0, c1, r0, r1, w0, w1
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fft4 \d0, \d1, \r0, \r1
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vtrn.32 \d0, \d1 @ z0, z2, z1, z3
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vhadd.s16 \r0, \d2, \d3 @ t1, t2, t3, t4
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vhsub.s16 \d3, \d2, \d3 @ z5, z7
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vmov \d2, \r0
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transform01 \q0, \q1, \d3, \c0, \c1, \r0, \w0, \w1
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.endm
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function fft4_neon
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vld1.16 {d0-d1}, [r0]
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fft4 d0, d1, d2, d3
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vst1.16 {d0-d1}, [r0]
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bx lr
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endfunc
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function fft8_neon
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vld1.16 {d0-d3}, [r0,:128]
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movrel r1, coefs
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vld1.16 {d30}, [r1,:64]
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vdup.16 d31, d30[0]
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fft8 d0, d1, d2, d3, q0, q1, d31, d30, d20, d21, q8, q9
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vtrn.32 d0, d1
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vtrn.32 d2, d3
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vst1.16 {d0-d3}, [r0,:128]
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bx lr
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endfunc
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function fft16_neon
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vld1.16 {d0-d3}, [r0,:128]!
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vld1.16 {d4-d7}, [r0,:128]
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movrel r1, coefs
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sub r0, r0, #32
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vld1.16 {d28-d31},[r1,:128]
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vdup.16 d31, d28[0]
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fft8 d0, d1, d2, d3, q0, q1, d31, d28, d20, d21, q8, q9
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vswp d5, d6
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fft4 q2, q3, q8, q9
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vswp d5, d6
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vtrn.32 q0, q1 @ z0, z4, z2, z6, z1, z5, z3, z7
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vtrn.32 q2, q3 @ z8, z12,z10,z14,z9, z13,z11,z15
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vswp d1, d2
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vdup.16 d31, d28[0]
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transform01 q0, q2, d5, d31, d28, d20, q8, q9
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vdup.16 d26, d29[0]
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vdup.16 d27, d30[0]
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transform2 d2, d6, d3, d7, q1, q3, d26, d30, d27, d29, \
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d20, d21, q8, q9
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vtrn.32 q0, q1
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vtrn.32 q2, q3
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vst1.16 {d0-d3}, [r0,:128]!
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vst1.16 {d4-d7}, [r0,:128]
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bx lr
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endfunc
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function fft_pass_neon
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push {r4,lr}
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movrel lr, coefs+24
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vld1.16 {d30}, [lr,:64]
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lsl r12, r2, #3
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vmov d31, d30
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add r3, r1, r2, lsl #2
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mov lr, #-8
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sub r3, r3, #2
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mov r4, r0
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vld1.16 {d27[]}, [r3,:16]
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sub r3, r3, #6
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vld1.16 {q0}, [r4,:128], r12
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vld1.16 {q1}, [r4,:128], r12
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vld1.16 {q2}, [r4,:128], r12
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vld1.16 {q3}, [r4,:128], r12
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vld1.16 {d28}, [r1,:64]!
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vld1.16 {d29}, [r3,:64], lr
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vswp d1, d2
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vswp d5, d6
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vtrn.32 d0, d1
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vtrn.32 d4, d5
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vdup.16 d25, d28[1]
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vmul.s16 d27, d27, d31
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transform01 q0, q2, d5, d25, d27, d20, q8, q9
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b 2f
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1:
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mov r4, r0
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vdup.16 d26, d29[0]
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vld1.16 {q0}, [r4,:128], r12
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vld1.16 {q1}, [r4,:128], r12
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vld1.16 {q2}, [r4,:128], r12
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vld1.16 {q3}, [r4,:128], r12
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vld1.16 {d28}, [r1,:64]!
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vld1.16 {d29}, [r3,:64], lr
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vswp d1, d2
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vswp d5, d6
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vtrn.32 d0, d1
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vtrn.32 d4, d5
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vdup.16 d24, d28[0]
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vdup.16 d25, d28[1]
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vdup.16 d27, d29[3]
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vmul.s16 q13, q13, q15
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transform2 d0, d4, d1, d5, q0, q2, d24, d26, d25, d27, \
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d16, d17, q9, q10
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2:
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vtrn.32 d2, d3
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vtrn.32 d6, d7
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vdup.16 d24, d28[2]
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vdup.16 d26, d29[2]
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vdup.16 d25, d28[3]
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vdup.16 d27, d29[1]
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vmul.s16 q13, q13, q15
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transform2 d2, d6, d3, d7, q1, q3, d24, d26, d25, d27, \
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d16, d17, q9, q10
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vtrn.32 d0, d1
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vtrn.32 d2, d3
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vtrn.32 d4, d5
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vtrn.32 d6, d7
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vswp d1, d2
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vswp d5, d6
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mov r4, r0
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vst1.16 {q0}, [r4,:128], r12
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vst1.16 {q1}, [r4,:128], r12
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vst1.16 {q2}, [r4,:128], r12
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vst1.16 {q3}, [r4,:128], r12
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add r0, r0, #16
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subs r2, r2, #2
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bgt 1b
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pop {r4,pc}
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endfunc
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#define F_SQRT1_2 23170
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#define F_COS_16_1 30274
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#define F_COS_16_3 12540
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const coefs, align=4
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.short F_SQRT1_2, -F_SQRT1_2, -F_SQRT1_2, F_SQRT1_2
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.short F_COS_16_1,-F_COS_16_1,-F_COS_16_1, F_COS_16_1
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.short F_COS_16_3,-F_COS_16_3,-F_COS_16_3, F_COS_16_3
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.short 1, -1, -1, 1
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endconst
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.macro def_fft n, n2, n4
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function fft\n\()_neon
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push {r4, lr}
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mov r4, r0
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bl fft\n2\()_neon
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add r0, r4, #\n4*2*4
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bl fft\n4\()_neon
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add r0, r4, #\n4*3*4
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bl fft\n4\()_neon
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mov r0, r4
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pop {r4, lr}
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movrel r1, X(ff_cos_\n\()_fixed)
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mov r2, #\n4/2
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b fft_pass_neon
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endfunc
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.endm
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def_fft 32, 16, 8
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def_fft 64, 32, 16
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def_fft 128, 64, 32
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def_fft 256, 128, 64
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def_fft 512, 256, 128
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def_fft 1024, 512, 256
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def_fft 2048, 1024, 512
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def_fft 4096, 2048, 1024
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def_fft 8192, 4096, 2048
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def_fft 16384, 8192, 4096
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def_fft 32768, 16384, 8192
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def_fft 65536, 32768, 16384
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function ff_fft_fixed_calc_neon, export=1
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ldr r2, [r0]
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sub r2, r2, #2
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movrel r3, fft_fixed_tab_neon
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ldr r3, [r3, r2, lsl #2]
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mov r0, r1
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bx r3
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endfunc
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const fft_fixed_tab_neon
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.word fft4_neon
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.word fft8_neon
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.word fft16_neon
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.word fft32_neon
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.word fft64_neon
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.word fft128_neon
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.word fft256_neon
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.word fft512_neon
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.word fft1024_neon
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.word fft2048_neon
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.word fft4096_neon
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.word fft8192_neon
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.word fft16384_neon
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.word fft32768_neon
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.word fft65536_neon
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endconst
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