* qatar/master: float_dsp: ppc: add a separate header for Altivec function prototypes ARM: fix float_dsp breakage from d5a7229 Add a float DSP framework to libavutil PPC: Move types_altivec.h and util_altivec.h from libavcodec to libavutil ARM: Move asm.S from libavcodec to libavutil vc1dsp: mark put/avg_vc1_mspel_mc() always_inline Merged-by: Michael Niedermayer <michaelni@gmx.at>
		
			
				
	
	
		
			62 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			62 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
| /*
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|  * Copyright (c) 2010 Mans Rullgard <mans@mansr.com>
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|  *
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|  * This file is part of FFmpeg.
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|  *
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|  * FFmpeg is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU Lesser General Public
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|  * License as published by the Free Software Foundation; either
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|  * version 2.1 of the License, or (at your option) any later version.
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|  *
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|  * FFmpeg is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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|  * Lesser General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU Lesser General Public
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|  * License along with FFmpeg; if not, write to the Free Software
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|  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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|  */
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| 
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| #include "libavutil/arm/asm.S"
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| 
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| function ff_dca_lfe_fir_neon, export=1
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|         push            {r4-r6,lr}
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| 
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|         add             r4,  r0,  r3,  lsl #2   @ out2
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|         add             r5,  r2,  #256*4-16     @ cf1
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|         sub             r1,  r1,  #12
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|         cmp             r3,  #32
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|         ite             eq
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|         moveq           r6,  #256/32
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|         movne           r6,  #256/64
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| NOVFP   vldr            s0,  [sp, #16]          @ scale
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|         mov             lr,  #-16
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| 1:
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|         vmov.f32        q2,  #0.0               @ v0
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|         vmov.f32        q3,  #0.0               @ v1
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|         mov             r12, r6
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| 2:
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|         vld1.32         {q8},     [r2,:128]!    @ cf0
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|         vld1.32         {q9},     [r5,:128], lr @ cf1
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|         vld1.32         {q1},     [r1], lr      @ in
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|         subs            r12, r12, #4
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|         vrev64.32       q10, q8
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|         vmla.f32        q3,  q1,  q9
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|         vmla.f32        d4,  d2,  d21
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|         vmla.f32        d5,  d3,  d20
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|         bne             2b
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| 
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|         add             r1,  r1,  r6,  lsl #2
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|         subs            r3,  r3,  #1
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|         vadd.f32        d4,  d4,  d5
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|         vadd.f32        d6,  d6,  d7
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|         vpadd.f32       d4,  d4,  d6
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|         vmul.f32        d5,  d4,  d0[0]
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|         vst1.32         {d5[0]},  [r0,:32]!
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|         vst1.32         {d5[1]},  [r4,:32]!
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|         bne             1b
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| 
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|         pop             {r4-r6,pc}
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| endfunc
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