fc6f02b297
cuda_runtime.h as well as dynlink_loader.h used nonstandard inclusion guards with an AV_ prefix, although these files are not in an libav*/ path. So change the inclusion guards and adapt the ref file of the source fate test accordingly. Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@gmail.com> Signed-off-by: Timo Rothenpieler <timo@rothenpieler.org>
132 lines
4.0 KiB
C++
132 lines
4.0 KiB
C++
/*
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* Minimum CUDA compatibility definitions header
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*
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* Copyright (c) 2019 Rodger Combs
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef COMPAT_CUDA_CUDA_RUNTIME_H
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#define COMPAT_CUDA_CUDA_RUNTIME_H
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// Common macros
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#define __global__ __attribute__((global))
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#define __device__ __attribute__((device))
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#define __device_builtin__ __attribute__((device_builtin))
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#define __align__(N) __attribute__((aligned(N)))
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#define __inline__ __inline__ __attribute__((always_inline))
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#define max(a, b) ((a) > (b) ? (a) : (b))
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#define min(a, b) ((a) < (b) ? (a) : (b))
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#define abs(x) ((x) < 0 ? -(x) : (x))
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#define atomicAdd(a, b) (__atomic_fetch_add(a, b, __ATOMIC_SEQ_CST))
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// Basic typedefs
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typedef __device_builtin__ unsigned long long cudaTextureObject_t;
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typedef struct __device_builtin__ __align__(2) uchar2
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{
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unsigned char x, y;
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} uchar2;
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typedef struct __device_builtin__ __align__(4) ushort2
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{
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unsigned short x, y;
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} ushort2;
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typedef struct __device_builtin__ uint3
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{
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unsigned int x, y, z;
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} uint3;
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typedef struct uint3 dim3;
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typedef struct __device_builtin__ __align__(8) int2
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{
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int x, y;
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} int2;
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typedef struct __device_builtin__ __align__(4) uchar4
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{
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unsigned char x, y, z, w;
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} uchar4;
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typedef struct __device_builtin__ __align__(8) ushort4
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{
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unsigned char x, y, z, w;
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} ushort4;
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typedef struct __device_builtin__ __align__(16) int4
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{
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int x, y, z, w;
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} int4;
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// Accessors for special registers
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#define GETCOMP(reg, comp) \
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asm("mov.u32 %0, %%" #reg "." #comp ";" : "=r"(tmp)); \
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ret.comp = tmp;
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#define GET(name, reg) static inline __device__ uint3 name() {\
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uint3 ret; \
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unsigned tmp; \
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GETCOMP(reg, x) \
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GETCOMP(reg, y) \
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GETCOMP(reg, z) \
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return ret; \
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}
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GET(getBlockIdx, ctaid)
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GET(getBlockDim, ntid)
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GET(getThreadIdx, tid)
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// Instead of externs for these registers, we turn access to them into calls into trivial ASM
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#define blockIdx (getBlockIdx())
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#define blockDim (getBlockDim())
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#define threadIdx (getThreadIdx())
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// Basic initializers (simple macros rather than inline functions)
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#define make_uchar2(a, b) ((uchar2){.x = a, .y = b})
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#define make_ushort2(a, b) ((ushort2){.x = a, .y = b})
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#define make_uchar4(a, b, c, d) ((uchar4){.x = a, .y = b, .z = c, .w = d})
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#define make_ushort4(a, b, c, d) ((ushort4){.x = a, .y = b, .z = c, .w = d})
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// Conversions from the tex instruction's 4-register output to various types
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#define TEX2D(type, ret) static inline __device__ void conv(type* out, unsigned a, unsigned b, unsigned c, unsigned d) {*out = (ret);}
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TEX2D(unsigned char, a & 0xFF)
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TEX2D(unsigned short, a & 0xFFFF)
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TEX2D(uchar2, make_uchar2(a & 0xFF, b & 0xFF))
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TEX2D(ushort2, make_ushort2(a & 0xFFFF, b & 0xFFFF))
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TEX2D(uchar4, make_uchar4(a & 0xFF, b & 0xFF, c & 0xFF, d & 0xFF))
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TEX2D(ushort4, make_ushort4(a & 0xFFFF, b & 0xFFFF, c & 0xFFFF, d & 0xFFFF))
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// Template calling tex instruction and converting the output to the selected type
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template <class T>
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static inline __device__ T tex2D(cudaTextureObject_t texObject, float x, float y)
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{
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T ret;
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unsigned ret1, ret2, ret3, ret4;
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asm("tex.2d.v4.u32.f32 {%0, %1, %2, %3}, [%4, {%5, %6}];" :
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"=r"(ret1), "=r"(ret2), "=r"(ret3), "=r"(ret4) :
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"l"(texObject), "f"(x), "f"(y));
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conv(&ret, ret1, ret2, ret3, ret4);
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return ret;
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}
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#endif /* COMPAT_CUDA_CUDA_RUNTIME_H */
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