We need the emulation to support the cases where the first argument is the same as the fourth. To achieve this a fifth argument working as a temporary may be needed. Emulation that doesn't obey the original instruction semantics can't be in x86inc. Signed-off-by: James Almer <jamrial@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
		
			
				
	
	
		
			75 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			NASM
		
	
	
	
	
	
			
		
		
	
	
			75 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			NASM
		
	
	
	
	
	
;******************************************************************************
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;* FLAC DSP SIMD optimizations
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;*
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;* Copyright (C) 2014 Loren Merritt
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION .text
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%macro LPC_32 1
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INIT_XMM %1
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cglobal flac_lpc_32, 5,6,5, decoded, coeffs, pred_order, qlevel, len, j
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    sub    lend, pred_orderd
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    jle .ret
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    lea    decodedq, [decodedq+pred_orderq*4-8]
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    lea    coeffsq, [coeffsq+pred_orderq*4]
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    neg    pred_orderq
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    movd   m4, qlevelm
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ALIGN 16
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.loop_sample:
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    movd   m0, [decodedq+pred_orderq*4+8]
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    add    decodedq, 8
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    movd   m1, [coeffsq+pred_orderq*4]
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    pxor   m2, m2
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    pxor   m3, m3
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    lea    jq, [pred_orderq+1]
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    test   jq, jq
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    jz .end_order
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.loop_order:
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    PMACSDQL m2, m0, m1, m2, m0
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    movd   m0, [decodedq+jq*4]
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    PMACSDQL m3, m1, m0, m3, m1
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    movd   m1, [coeffsq+jq*4]
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    inc    jq
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    jl .loop_order
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.end_order:
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    PMACSDQL m2, m0, m1, m2, m0
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    psrlq  m2, m4
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    movd   m0, [decodedq]
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    paddd  m0, m2
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    movd   [decodedq], m0
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    sub  lend, 2
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    jl .ret
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    PMACSDQL m3, m1, m0, m3, m1
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    psrlq  m3, m4
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    movd   m1, [decodedq+4]
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    paddd  m1, m3
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    movd   [decodedq+4], m1
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    jg .loop_sample
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.ret:
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    REP_RET
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%endmacro
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%if HAVE_XOP_EXTERNAL
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LPC_32 xop
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%endif
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LPC_32 sse4
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